- 专利标题： Low read current architecture for memory
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申请号： US14254209申请日： 2014-04-16
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公开(公告)号： US09368200B2公开(公告)日： 2016-06-14
- 发明人: Bruce Lynn Bateman , Christophe Chevallier , Darrell Rinerson , Chang Hua Siau
- 申请人： Unity Semiconductor Corporation
- 申请人地址： US CA Sunnyvale
- 专利权人： Unity Semiconductor Corporation
- 当前专利权人： Unity Semiconductor Corporation
- 当前专利权人地址： US CA Sunnyvale
- 代理机构： Lowenstein Sandler LLP
- 主分类号： G11C7/00
- IPC分类号： G11C7/00 ; G11C13/00 ; G11C7/12 ; G11C7/22
摘要：
A low read current architecture for memory. Bit lines of a cross point memory array are allowed to be charged by a selected word line until a minimum voltage differential between a memory state and a reference level is assured.
公开/授权文献
- US20140334222A1 LOW READ CURRENT ARCHITECTURE FOR MEMORY 公开/授权日：2014-11-13
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