Invention Grant
US09262326B2 Method and apparatus to enable the cooperative signaling of a shared bus interrupt in a multi-rank memory subsystem
有权
能够在多级存储器子系统中启用共享总线中断的协同信令的方法和装置
- Patent Title: Method and apparatus to enable the cooperative signaling of a shared bus interrupt in a multi-rank memory subsystem
- Patent Title (中): 能够在多级存储器子系统中启用共享总线中断的协同信令的方法和装置
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Application No.: US11565034Application Date: 2006-11-30
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Publication No.: US09262326B2Publication Date: 2016-02-16
- Inventor: Barry Joe Wolford , James Edward Sullivan, Jr.
- Applicant: Barry Joe Wolford , James Edward Sullivan, Jr.
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Peter Michael Kamarchik; Paul Holdaway
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F13/16
Abstract:
A memory system is disclosed. The memory system includes first and second memory devices, and a memory controller configured to selectively enable one of the memory devices, the memory controller having a first line coupled to the first and second memory devices and a second line coupled to the first and second memory devices. The first memory device is configured to provide a notification to the memory controller on the first line and the second memory device is configured to provide a notification to the memory controller on the second line. The first memory device is further configured not to load the first line and the second memory device is further configured not to load the second line when the memory controller is writing to the enabled memory device.
Public/Granted literature
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