Invention Grant
- Patent Title: Method of forming via hole
- Patent Title (中): 形成通孔的方法
-
Application No.: US14541148Application Date: 2014-11-14
-
Publication No.: US09147601B2Publication Date: 2015-09-29
- Inventor: Cheng-Han Wu , Chun-Chi Yu
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L21/311
- IPC: H01L21/311 ; H01L21/302 ; H01L21/768 ; H01L21/3213 ; H01L21/033 ; H01L21/027

Abstract:
The present invention provides a method of forming via holes. First, a substrate is provided. A plurality of first areas is defined on the substrate. A dielectric layer and a blocking layer are formed on the substrate. A patterned layer is formed on the blocking layer such that a sidewall of the blocking layer is completely covered by the patterned layer. The patterned layer includes a plurality of holes arranged in a regular array wherein the area of the hole array is greater than those of the first areas. The blocking layer in the first areas is removed by using the patterned layer as a mask. Lastly, the dielectric layer is patterned to form at least a via hole in the dielectric layer in the first area.
Public/Granted literature
- US20150072529A1 METHOD OF FORMING VIA HOLE Public/Granted day:2015-03-12
Information query
IPC分类: