Invention Grant
US09135015B1 Run-time code parallelization with monitoring of repetitive instruction sequences during branch mis-prediction 有权
在分支误预测中监视重复指令序列的运行时代码并行化

Run-time code parallelization with monitoring of repetitive instruction sequences during branch mis-prediction
Abstract:
A method includes, in a processor that executes instructions of program code, monitoring the instructions in a segment of a repetitive sequence of the instructions so as to construct a specification of register access by the monitored instructions. In response to detecting a branch mis-prediction in the monitored instructions, the specification is corrected so as to compensate for the branch mis-prediction. Execution of the repetitive sequence is parallelized based on the corrected specification.
Information query
Patent Agency Ranking
0/0