Methods of forming layer patterns of a semiconductor device

Invention Grant

US09123655B2 Methods of forming layer patterns of a semiconductor device 有权

Title translation: 形成半导体器件的层图案的方法

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Patent Title: Methods of forming layer patterns of a semiconductor device
Patent Title (中): 形成半导体器件的层图案的方法
Application No.: US14190797

Application Date: 2014-02-26
Publication No.: US09123655B2

Publication Date: 2015-09-01
Inventor: Tae-Hwan Oh , Yu-Ra Kim , Tae-Sun Kim , Kwang-Sub Yoon
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Applicant Address: KR Suwon-si, Gyeonggi-do
Assignee: SAMSUNG ELECTRONICS CO., LTD.
Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
Current Assignee Address: KR Suwon-si, Gyeonggi-do
Agency: Lee & Morse, P.C.
Priority: KR10-2013-0020204 20130226
Main IPC: H01L21/311
IPC: H01L21/311 ; H01L21/308 ; H01L21/306

Methods of forming layer patterns of a semiconductor device

Abstract:

A method of manufacturing a layer pattern of a semiconductor device, the method including forming an anti-reflective coating (ARC) layer on an etching object layer such that the ARC layer includes a polymer having an imide group; forming a photoresist pattern on the ARC layer; wet etching portions of the ARC layer exposed by the photoresist pattern to form an ARC layer pattern; and etching the etching object layer using the photoresist pattern as an etch mask to form the layer pattern.

Abstract(Chinese):

一种制造半导体器件的层图案的方法，所述方法包括在蚀刻对象层上形成抗反射涂层（ARC）层，使得ARC层包括具有酰亚胺基团的聚合物; 在ARC层上形成光刻胶图案; 通过光致抗蚀剂图案曝光的ARC层的湿蚀刻部分以形成ARC层图案; 并使用光致抗蚀剂图案蚀刻蚀刻对象层作为蚀刻掩模以形成层图案。

Public/Granted literature

US20140242800A1 METHODS OF FORMING LAYER PATTERNS OF A SEMICONDUCTOR DEVICE Public/Granted day:2014-08-28

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Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/18	...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料
H01L21/30	....用H01L21/20至H01L21/26各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/28）
H01L21/31	.....在半导体材料上形成绝缘层的，例如用于掩膜的或应用光刻技术的（密封层入H01L21/56）；以及这些层的后处理；这些层的材料的选择
H01L21/3105	......后处理
H01L21/311	.......绝缘层的刻蚀