A thin film transistor substrate a display area that includes pixels connected to gate lines and data lines crossing the gate lines, a non-display area disposed adjacent to the display area, data pads disposed in the non-display area and each being connected to a first end of a corresponding data line of the data lines, first transistors disposed in the non-display area and each being connected to a second end of the corresponding data line of the data lines, OS pads connected to the second end of the data lines, and repair lines disposed in the non-display area along a vicinity of the display area and arranged while interposing the first transistors therebetween. The OS pads are overlapped with the first transistors and the repair lines.