发明授权
- 专利标题: Three dimensional stacked structure for chips
- 专利标题(中): 芯片三维堆叠结构
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申请号: US14147293申请日: 2014-01-03
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公开(公告)号: US09030015B2公开(公告)日: 2015-05-12
- 发明人: Tsai-Yu Huang , Yi-Feng Huang
- 申请人: Tsai-Yu Huang , Yi-Feng Huang
- 代理机构: Huntington IP Consulting Co., Ltd.
- 代理商 Chih Feng Yeh
- 优先权: TW102100320A 20130104
- 主分类号: H01L23/52
- IPC分类号: H01L23/52 ; H01L23/522 ; H01L21/66
摘要:
A 3-D chip stacked structure is disclosed. Each chip layer is provided with plural single-layered conductive members where among the same chip layer the two adjacent conductive members are structurally formed in mirror symmetric way with each other along a chip longitudinal direction and the arrangements of the single-layered conductive members of the two adjacent chip layers are shifted by a test pad distance. The single-layered conductive members of the two adjacent chip layers are communicated through a vertical TSV (through silicon via). Therefore, a selection signal or an enabling signal might be transferred through this specific metal layer and related TSV to reach targeting chip layer and targeting circuit.
公开/授权文献
- US20140191234A1 Three Dimensional Stacked Structure for Chips 公开/授权日:2014-07-10
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