Hardmask composition and method of forming patterns and semiconductor integrated circuit device including the patterns

Invention Grant

US08952373B2 Hardmask composition and method of forming patterns and semiconductor integrated circuit device including the patterns 有权

Title translation: 硬掩模组成和形成图案的方法和包括图案的半导体集成电路器件

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Patent Title: Hardmask composition and method of forming patterns and semiconductor integrated circuit device including the patterns
Patent Title (中): 硬掩模组成和形成图案的方法和包括图案的半导体集成电路器件
Application No.: US14037722

Application Date: 2013-09-26
Publication No.: US08952373B2

Publication Date: 2015-02-10
Inventor: Yoo-Jeong Choi , Yun-Jun Kim , Joon-Young Moon , Bum-Jin Lee , Chung-Heon Lee , Youn-Jin Cho
Applicant: Yoo-Jeong Choi , Yun-Jun Kim , Joon-Young Moon , Bum-Jin Lee , Chung-Heon Lee , Youn-Jin Cho
Applicant Address: KR Gumi-si, Kyeongsangbuk-do
Assignee: Cheil Industries, Inc.
Current Assignee: Cheil Industries, Inc.
Current Assignee Address: KR Gumi-si, Kyeongsangbuk-do
Agency: Lee & Morse, P.C.
Priority: KR10-2012-0155332 20121227
Main IPC: H01L21/47
IPC: H01L21/47 ; H01L23/00 ; G03F7/11 ; H01L21/02 ; H01L21/027 ; H01L21/033

Hardmask composition and method of forming patterns and semiconductor integrated circuit device including the patterns

Abstract:

A hardmask composition includes a monomer represented by the following Chemical Formula 1 and an aromatic ring-containing polymer,

Abstract(Chinese):

硬掩模组合物包括由以下化学式1表示的单体和含芳环的聚合物，

Public/Granted literature

US20140183701A1 HARDMASK COMPOSITION AND METHOD OF FORMING PATTERNS AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INCLUDING THE PATTERNS Public/Granted day:2014-07-03

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/34	...具有H01L21/06，H01L21/16及H01L21/18各组不包含的或有或无杂质，例如掺杂材料的半导体的器件
H01L21/46	....用H01L21/36至H01L21/428各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/44）
H01L21/461	.....改变半导体材料的表面物理特性或形状的，例如腐蚀、抛光、切割
H01L21/469	......在半导体材料上形成绝缘层的，例如，用于掩膜的或应用光刻技术的（密封层入H01L21/56）以及这些层的后处理
H01L21/47	.......有机层，例如光刻胶（H01L21/475，H01L21/4757优先）