Invention Grant
- Patent Title: Store handling in a processor
- Patent Title (中): 在处理器中存储处理
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Application No.: US13544492Application Date: 2012-07-09
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Publication No.: US08892841B2Publication Date: 2014-11-18
- Inventor: Ramesh Gunna , Po-Yung Chang , Sudarshan Kadambi
- Applicant: Ramesh Gunna , Po-Yung Chang , Sudarshan Kadambi
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Agent Lawrence J. Merkel
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06F12/08 ; G06F12/10

Abstract:
In one embodiment, a processor may be configured to write ECC granular stores into the data cache, while non-ECC granular stores may be merged with cache data in a memory request buffer. In one embodiment, a processor may be configured to detect that a victim block writeback hits one or more stores in a memory request buffer (or vice versa) and may convert the victim block writeback to a fill. In one embodiment, a processor may speculatively issue stores that are subsequent to a load from a load/store queue, but prevent the update for the stores in response to a snoop hit on the load.
Public/Granted literature
- US20120278685A1 Store Handling in a Processor Public/Granted day:2012-11-01
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