Invention Grant
- Patent Title: Methods and apparatus for flip-chip-on-lead semiconductor package
- Patent Title (中): 倒装芯片导联半导体封装的方法和装置
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Application No.: US12112192Application Date: 2008-04-30
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Publication No.: US08785250B2Publication Date: 2014-07-22
- Inventor: Nirmal Sharma , Virgil Ararao
- Applicant: Nirmal Sharma , Virgil Ararao
- Applicant Address: US MA Worcester
- Assignee: Allegro Microsystems, LLC
- Current Assignee: Allegro Microsystems, LLC
- Current Assignee Address: US MA Worcester
- Agency: Daly, Crowley, Mofford & Durkee, LLP
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/52

Abstract:
Fabrication of a semiconductor package includes placing a conductive material on a protrusion from a leadframe to form a first assembly, forming a non-conductive mask about the protrusion, and placing a die on the first assembly, the die having an active area. Fabrication can further include reflowing the conductive material to form a second assembly such that a connection extends from the die active area, through the conductive material, to the protrusion. A semiconductor package includes a leadframe having a protrusion, a conductive material reflowed to the protrusion, and a die having an active area coupled to the protrusion by the reflowed solder.
Public/Granted literature
- US20080230879A1 METHODS AND APPARATUS FOR FLIP-CHIP-ON-LEAD SEMICONDUCTOR PACKAGE Public/Granted day:2008-09-25
Information query
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