A power supply topology is used in which a transistor is provided on the side of an output node of a rectifying circuit. An inductor is provided on the side of a reference node, a resistor is inserted between the transistor and the inductor, and one end of the resistor is coupled to a ground power supply voltage of a PFC circuit. The PFC circuit includes a square circuit which squares a result of multiplication of an input voltage detection signal and feedback information (output voltage of an error amplifier circuit). The PFC circuit drives on the transistor when a detection voltage developed at the resistor reaches zero, and drives off the transistor when the detection signal reaches an output signal of the square circuit.