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US08742591B2 Semiconductor device and method of forming insulating layer in notches around conductive TSV for stress relief 有权
在导电TSV周围形成绝缘层的半导体器件和方法，用于应力消除

Semiconductor device and method of forming insulating layer in notches around conductive TSV for stress relief
摘要：
A semiconductor device has a plurality of conductive vias formed into a semiconductor wafer. A portion of the semiconductor wafer is removed so the conductive vias extend above a surface of the semiconductor wafer. A notch is formed in the semiconductor wafer around each of the conductive vias. The notch around the conductive vias can be formed by wet etching, dry etching, or LDA. A first insulating layer is formed over a surface of the semiconductor wafer and conductive vias and into the notch to provide stress relief between the conductive vias and semiconductor wafer. A portion of the first insulating layer is removed to expose the conductive vias. A first conductive layer and second insulating layer can be formed around the conductive vias. A second conductive layer can be formed over the conductive vias. The notch can extend into the second insulating layer.
摘要（中）：

半导体器件具有形成为半导体晶片的多个导电通孔。 去除半导体晶片的一部分，使得导电通孔延伸到半导体晶片的表面之上。 在每个导电通孔周围的半导体晶片中形成切口。 导电通孔周围的凹口可以通过湿蚀刻，干蚀刻或LDA形成。 第一绝缘层形成在半导体晶片和导电通孔的表面上并进入凹口中，以在导电通孔和半导体晶片之间提供应力消除。 去除第一绝缘层的一部分以露出导电通孔。 可以在导电通孔周围形成第一导电层和第二绝缘层。 可以在导电通孔上形成第二导电层。 凹口可以延伸到第二绝缘层中。

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