A system includes a first circuit and a second circuit that are constituted by a semiconductor device, the second circuit controlling the first circuit. The first circuit includes an interface unit that performs communication with the second circuit, a plurality of sense amplifiers including a first sense amplifier, each of the plurality of sense amplifiers performing communication with the interface unit, a first global bit line, a dummy global bit line, a plurality of first memory blocks, each of the first memory blocks including a first hierarchy switch that is connected to the first global bit line, a dummy memory block including a dummy hierarchy switch that is connected to the dummy global bit line, and a first dummy local bit line connected to the dummy global bit line, and a control circuit that controls the first hierarchy switches and the dummy hierarchy switch.