Invention Grant
US08466544B2 Semiconductor device and method of forming interposer and opposing build-up interconnect structure with connecting conductive TMV for electrical interconnect of Fo-WLCSP 有权
半导体器件和形成插入件的相反的构建互连结构的方法和连接用于Fo-WLCSP的电互连的导电TMV

  • Patent Title: Semiconductor device and method of forming interposer and opposing build-up interconnect structure with connecting conductive TMV for electrical interconnect of Fo-WLCSP
  • Patent Title (中): 半导体器件和形成插入件的相反的构建互连结构的方法和连接用于Fo-WLCSP的电互连的导电TMV
  • Application No.: US13035669
    Application Date: 2011-02-25
  • Publication No.: US08466544B2
    Publication Date: 2013-06-18
  • Inventor: Reza A. Pagaila
  • Applicant: Reza A. Pagaila
  • Applicant Address: SG Singapore
  • Assignee: STATS ChipPAC, Ltd.
  • Current Assignee: STATS ChipPAC, Ltd.
  • Current Assignee Address: SG Singapore
  • Agency: Patent Law Group: Atkins & Associates, P.C.
  • Agent Robert D. Atkins
  • Main IPC: H01L23/485
  • IPC: H01L23/485 H01L21/56
Semiconductor device and method of forming interposer and opposing build-up interconnect structure with connecting conductive TMV for electrical interconnect of Fo-WLCSP
Abstract:
A semiconductor device has a substrate with a plurality of conductive vias and conductive layer formed over the substrate. A semiconductor die is mounted over a carrier. The substrate is mounted to the semiconductor die opposite the carrier. An encapsulant is deposited between the substrate and carrier around the semiconductor die. A plurality of conductive TMVs is formed through the substrate and encapsulant. The conductive TMVs protrude from the encapsulant to aid with alignment of the interconnect structure. The conductive TMVs are electrically connected to the conductive layer and conductive vias. The carrier is removed and an interconnect structure is formed over a surface of the encapsulant and semiconductor die opposite the substrate. The interconnect structure is electrically connected to the conductive TMVs. A plurality of semiconductor devices can be stacked and electrically connected through the substrate, conductive TMVs, and interconnect structure.
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