A system and method for aggressive loop parallelization using speculative execution is disclosed. The method may include transforming code of a target application for concurrent execution, which may include adding an instruction to create a global address table entry for each store operation on which a load operation of a different loop iteration is dependent. The method may include replacing a standard load instruction with a special instruction configured to determine if an operand address of the load matches an operand address in one of the global address table entries. Another special instruction may remove a table entry following execution of the corresponding store operation. If an operand address of a load of a currently executing thread matches an operand address in the global address table, the method may include setting a checkpoint, completing execution of the thread in a pre-fetch mode, and re-executing the thread from the checkpoint.