A pulse width modulation (PWM) controller includes: a first counter for counting a reference clock signal, and thus outputting a first count value, a leading edge control signal generator for outputting a leading edge control signal on a basis of the first count value, an adjustment clock generator for generating an adjustment clock signal, a second counter controller for instructing the adjustment clock generator to start to output the adjustment clock signal, a second counter for outputting a second count value, a trailing edge control signal generator for outputting a trailing edge control signal on a basis of the second count value, and a PWM pulse generator for synthesizing the leading edge control signal and the trailing edge control signal, and thus generating a pulse width modulation signal.