发明授权
US08274306B1 Electronic logic circuit with physically unclonable function characteristics
有权
具有物理不可克隆功能特性的电子逻辑电路
- 专利标题: Electronic logic circuit with physically unclonable function characteristics
- 专利标题(中): 具有物理不可克隆功能特性的电子逻辑电路
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申请号: US13066229申请日: 2011-03-31
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公开(公告)号: US08274306B1公开(公告)日: 2012-09-25
- 发明人: Joseph P. Garcia
- 申请人: Joseph P. Garcia
- 申请人地址: US DC Washington
- 专利权人: The United States of America as represented by the Secretary of the Navy
- 当前专利权人: The United States of America as represented by the Secretary of the Navy
- 当前专利权人地址: US DC Washington
- 代理商 Gerhard W. Thielman, Esq.
- 主分类号: H03K19/00
- IPC分类号: H03K19/00
摘要:
A physically unclonable function (PUF) device, with corresponding method, is provided for characterizing an integrated circuit. The PUF device includes a digital clock manager (DCM), a Butterfly circuit incorporated within the integrated circuit, and a shift register. The DCM receives a clock input signal (CLK) and imposes a temporal offset to produce a phase-shift signal (PS). The Butterfly circuit receives a first excite signal as said CLK and a second excite signal as said PS. In response, the Butterfly circuit produces an output that shifts state in response to a non-concurrent change in the CLK and PS. The shift register increments a shift count in response to the output.
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