发明授权
- 专利标题: Semiconductor integrated circuit device and clock control method
- 专利标题(中): 半导体集成电路器件及时钟控制方法
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申请号: US12341147申请日: 2008-12-22
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公开(公告)号: US08195975B2公开(公告)日: 2012-06-05
- 发明人: Yutaka Yamada , Takashi Yoshikawa , Shigehiro Asano
- 申请人: Yutaka Yamada , Takashi Yoshikawa , Shigehiro Asano
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Tokyo
- 代理机构: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- 优先权: JP2007-334824 20071226
- 主分类号: G06F1/04
- IPC分类号: G06F1/04
摘要:
A plurality of operation units connected in a pipeline structure performs an operation processing on data. A process control unit operates in synchronization with a system clock signal and generates a process control signal for controlling the operation units upon receiving a data notification signal that notifies the process control unit of an arrival of data from outside. A clock-control signal generating unit operates in synchronization with the system clock signal and generates a clock control signal for controlling a clock supply to each of the operation units upon receiving the process control signal.
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