Invention Grant
- Patent Title: Semiconductor manufacturing method and semiconductor device
- Patent Title (中): 半导体制造方法和半导体器件
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Application No.: US13099587Application Date: 2011-05-03
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Publication No.: US08148217B2Publication Date: 2012-04-03
- Inventor: Takashi Izumida , Sanae Ito , Takahisa Kanemura
- Applicant: Takashi Izumida , Sanae Ito , Takahisa Kanemura
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: JP2005-129608 20050427
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A method of manufacturing a semiconductor device includes forming a mask layer on a first-conductivity-type semiconductor substrate, etching the semiconductor substrate using the mask layer as a mask, thereby forming a projecting semiconductor layer, forming a first insulating layer on the semiconductor substrate to cover a lower portion of the projecting semiconductor layer, doping a first-conductivity-type impurity into the first insulating layer, thereby forming a high-impurity-concentration layer in the lower portion of the projecting semiconductor layer, forming gate insulating films on side surfaces of the projecting semiconductor layer which upwardly extend from an upper surface of the first insulating layer, and forming a gate electrode on the gate insulating films and on the first insulating film.
Public/Granted literature
- US20110207309A1 SEMICONDUCTOR MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE Public/Granted day:2011-08-25
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