Invention Grant
- Patent Title: Integrated circuit system employing back end of line via techniques
- Patent Title (中): 集成电路系统采用后端线技术
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Application No.: US12132342Application Date: 2008-06-03
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Publication No.: US08115276B2Publication Date: 2012-02-14
- Inventor: Shaoqing Zhang , Fan Zhang , Shao-fu Sanford Chu , Bei Chao Zhang
- Applicant: Shaoqing Zhang , Fan Zhang , Shao-fu Sanford Chu , Bei Chao Zhang
- Applicant Address: SG Singapore
- Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Current Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agent Mikio Ishimaru
- Main IPC: H01L21/283
- IPC: H01L21/283 ; H01L21/02 ; H01L29/92

Abstract:
An integrated circuit system that includes: providing a substrate including front-end-of-line circuitry; forming a first metallization layer over the substrate and electrically connected to the substrate; forming a viabar or a via group over the first metallization layer; and forming a second metallization layer over the first metallization layer and electrically connected to the first metallization layer through either the viabar or the via group.
Public/Granted literature
- US20090294904A1 INTEGRATED CIRCUIT SYSTEM EMPLOYING BACK END OF LINE VIA TECHNIQUES Public/Granted day:2009-12-03
Information query
IPC分类: