Invention Grant
- Patent Title: Semiconductor memory device
- Patent Title (中): 半导体存储器件
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Application No.: US13158098Application Date: 2011-06-10
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Publication No.: US08085585B2Publication Date: 2011-12-27
- Inventor: Hiroyuki Nagashima , Hirofumi Inoue
- Applicant: Hiroyuki Nagashima , Hirofumi Inoue
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2007-307587 20071128
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
A semiconductor memory device includes a memory block having a three-dimensional memory cell array structure in which memory cell arrays are stacked, the memory cell array including: a plurality of first interconnections which are parallel to one another; a plurality of second interconnections which are formed so as to intersect with the plurality of first interconnections, the second interconnections being parallel to one another; and a memory cell which is disposed in each intersection portion of the first interconnection and the second interconnection, one end of the memory cell being connected to the first interconnection, the other end of the memory cell being connected to the second interconnection. The first interconnection disposed between the adjacent memory cell arrays is shared by memory cells above and below the first interconnection, and the vertically-overlapping first interconnections are connected to each other.
Public/Granted literature
- US20110241225A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2011-10-06
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