发明授权
- 专利标题: Method for manufacturing a semiconductor package
- 专利标题(中): 半导体封装的制造方法
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申请号: US12591791申请日: 2009-12-01
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公开(公告)号: US08017437B2公开(公告)日: 2011-09-13
- 发明人: Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
- 申请人: Do-Jae Yoo , Young-Do Kweon , Seog-Moon Choi , Bum-Sik Jang , Tae-Sung Jeong
- 申请人地址: KR Suwon
- 专利权人: Samsung Electro—Mechanics Co., Ltd.
- 当前专利权人: Samsung Electro—Mechanics Co., Ltd.
- 当前专利权人地址: KR Suwon
- 优先权: KR10-2007-0057147 20070612
- 主分类号: H01L21/44
- IPC分类号: H01L21/44 ; H01L21/48 ; H01L21/50
摘要:
A method of manufacturing a semiconductor package which includes mounting a first chip on a first substrate by a flip chip method, the first substrate having a pre-designed pattern formed thereon; forming at least one bump by performing soldering, on at least one predetermined position electrically connected with the pattern formed on the first substrate; forming a first molding by performing molding, such that the first molding covers the first substrate and the first chip; placing an interposer on the first molding; and placing a second substrate on the interposer, the second substrate having a second chip mounted thereon.
公开/授权文献
- US20100087035A1 Method for manufacturing a semiconductor package 公开/授权日:2010-04-08
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