发明授权
US07977237B2 Fabricating vias of different size of a semiconductor device by splitting the via patterning process
有权
通过分割通孔图案化工艺制造不同尺寸的半导体器件的通孔
- 专利标题： Fabricating vias of different size of a semiconductor device by splitting the via patterning process
- 专利标题（中）： 通过分割通孔图案化工艺制造不同尺寸的半导体器件的通孔
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申请号： US12894648申请日： 2010-09-30
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公开(公告)号： US07977237B2公开(公告)日： 2011-07-12
- 发明人: Frank Feustel , Thomas Werner , Kai Frohberg
- 申请人： Frank Feustel , Thomas Werner , Kai Frohberg
- 申请人地址： KY Grand Cayman, Cayman Islands
- 专利权人： GLOBALFOUNDRIES Inc.
- 当前专利权人： GLOBALFOUNDRIES Inc.
- 当前专利权人地址： KY Grand Cayman, Cayman Islands
- 代理机构： Williams, Morgan & Amerson, P.C.
- 优先权： DE102009046242 20091030
- 主分类号： H01L21/4763
- IPC分类号： H01L21/4763 ; H01L21/44
摘要：
When forming a complex metallization system in which vias of different lateral size have to be provided, a split patterning sequence may be applied. For this purpose, a lithography process may be specifically designed for the critical via openings and a subsequent second patterning process may be applied for forming the vias of increased lateral dimensions, while the critical vias are masked. In this manner, superior process conditions may be established for each of the patterning sequences.
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