发明授权
US07957208B1 Flexible memory architectures for programmable logic devices 有权
用于可编程逻辑器件的灵活存储器架构

Flexible memory architectures for programmable logic devices
摘要:
In one embodiment, a programmable logic device includes a plurality of logic blocks; a plurality of input/output blocks; volatile configuration memory adapted to store configuration data for configuration of the logic blocks and input/output blocks; embedded block RAM adapted to store user data; flash memory having at least a first partition and a second partition; and a data port adapted to provide external device access to the first partition of the non-volatile memory. The flash memory is adapted to store within the first partition user data from the data port and is further adapted to store within the second partition user data from the embedded block RAM.
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