发明授权
- 专利标题: Redundancy architecture for an integrated circuit memory
- 专利标题(中): 集成电路存储器的冗余架构
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申请号: US11785583申请日: 2007-04-18
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公开(公告)号: US07924638B2公开(公告)日: 2011-04-12
- 发明人: Hemangi Umakant Gajjewar , Karl Lin Wang
- 申请人: Hemangi Umakant Gajjewar , Karl Lin Wang
- 申请人地址: GB Cambridge
- 专利权人: ARM Limited
- 当前专利权人: ARM Limited
- 当前专利权人地址: GB Cambridge
- 代理机构: Nixon & Vanderhye P.C.
- 主分类号: G11C7/00
- IPC分类号: G11C7/00
摘要:
An integrated circuit memory is described having multiple memory banks which are grouped into repair groups Group0, Group1. One of the memory banks is provided with redundant rows which can be used to substitute for a defective row found within any of the memory banks within the common repair group concerned. Redundant columns of memory cells are also provided and these may be substituted for defective columns by multiplexing circuitry. This multiplexing circuitry shifts the bit lines which are selected to form part of a bit group to access a given data bit by an amount less than the multiplexing width being supported by that multiplexing circuitry thereby reducing the number of redundant columns which need be provided.
公开/授权文献
- US20080259701A1 Redundancy architecture for an integrated circuit memory 公开/授权日:2008-10-23
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