发明授权
US07924619B2 Programming method to reduce word line to word line breakdown for NAND flash 有权
用于减少NAND闪存字线到字线的编程方法

Programming method to reduce word line to word line breakdown for NAND flash
摘要:
A NAND architecture non-volatile memory device and programming process programs the various cells of strings of non-volatile memory cells by the application of differing word line pass voltages (Vpass) to the unselected word lines adjacent to the selected word line and memory cell being programmed in order to reduce voltage differences between the word lines of the memory cell string or array during a programming cycle. This allows the word line to word line voltage differential to be reduced and thus decreases the likelihood of breakdown or punch through of the insulator materials placed between the adjacent word lines.
信息查询
0/0