发明授权
US07769166B2 Dual mode AES implementation to support single and multiple AES operations 有权
双模AES实现,支持单AES和多AES操作

Dual mode AES implementation to support single and multiple AES operations
摘要:
An apparatus comprising a mode circuit and an encryption circuit. The mode circuit may be configured to selectively provide register input data on an output signal when in a first mode and memory data on the output signal when in a second mode. The encryption circuit may be configured to interchangeably encrypt/decrypt between the register input data and the memory data.
信息查询
0/0