发明授权
- 专利标题: Arithmetic operation unit, information processing apparatus and arithmetic operation method
- 专利标题(中): 算术运算单元,信息处理装置和算术运算方法
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申请号: US11385718申请日: 2006-03-22
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公开(公告)号: US07720899B2公开(公告)日: 2010-05-18
- 发明人: Kunihiko Tajiri
- 申请人: Kunihiko Tajiri
- 申请人地址: JP Kawasaki
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JP Kawasaki
- 代理机构: Staas & Halsey LLP
- 优先权: JP2005-349804 20051202
- 主分类号: G06F7/38
- IPC分类号: G06F7/38
摘要:
An arithmetic operation unit, which generates information representing whether or not an arithmetic operation result has been shifted when the arithmetic operation result is normalized, has an arithmetic logical unit outputting the arithmetic operation result, a normalizer having a plurality of shifter normalizing the arithmetic operation result, a shift amount calculator calculating a plurality of shift amounts for the plural shifter, and a predictor generating interim information that is a result of prediction of whether or not the arithmetic operation result is to be shifted when the arithmetic operation result is normalized, by using the plural shift amounts, and a generator generating the information by using the interim information. The cycle time required to generate a sticky bit is shortened to efficiently generate the sticky bit, and the hardware resources for generating the sticky bit is reduced.
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