A pixel structure disposed on a substrate includes a gate, a patterned dielectric layer, a patterned semiconductor layer, a patterned metal layer, an overcoat layer and a transparent pixel electrode. The patterned dielectric layer and the gate covered thereby are disposed on the substrate. The patterned semiconductor layer on the patterned dielectric layer includes bumps and a channel above the gate. The patterned metal layer includes a source, a drain and a reflective pixel electrode connecting the drain. The source and the drain cover a portion of the channel. The reflective pixel electrode covers the bumps. The gate, the patterned dielectric layer, the patterned semiconductor layer and the patterned metal layer form a transistor on which the overcoat layer has a contact hole exposing a portion of the reflective pixel electrode. The transparent pixel electrode on the overcoat layer electrically connects the reflective pixel electrode through the contact hole.