Invention Grant
US07560339B2 Nonvolatile memory cell comprising a reduced height vertical diode
有权
非易失性存储单元包括减小的高度的垂直二极管
- Patent Title: Nonvolatile memory cell comprising a reduced height vertical diode
- Patent Title (中): 非易失性存储单元包括减小的高度的垂直二极管
-
Application No.: US11866403Application Date: 2007-10-02
-
Publication No.: US07560339B2Publication Date: 2009-07-14
- Inventor: S. Brad Herner , Steven J. Radigan
- Applicant: S. Brad Herner , Steven J. Radigan
- Applicant Address: US CA Milpitas
- Assignee: Sandisk 3D LLC
- Current Assignee: Sandisk 3D LLC
- Current Assignee Address: US CA Milpitas
- Agency: Dugan & Dugan, PC
- Main IPC: H01L29/80
- IPC: H01L29/80

Abstract:
A nonvolatile memory cell according to the present invention comprises a bottom conductor, a semiconductor pillar, and a top conductor. The semiconductor pillar comprises a junction diode, including a bottom heavily doped region, a middle intrinsic or lightly doped region, and a top heavily doped region, wherein the conductivity types of the top and bottom heavily doped region are opposite. The junction diode is vertically oriented and is of reduced height, between about 500 angstroms and about 3500 angstroms. A monolithic three dimensional memory array of such cells can be formed comprising multiple memory levels, the levels monolithically formed above one another.
Public/Granted literature
- US20080026510A1 NONVOLATILE MEMORY CELL COMPRISING A REDUCED HEIGHT VERTICAL DIODE Public/Granted day:2008-01-31
Information query
IPC分类: