The sub panel 100, having a plurality of gate bus lines 14, source bus lines 16, TFTs 25 and pixel electrodes, is provided with a source driver 15. The main panel 200 has a plurality of gate bus lines 24, source bus lines 16, TFTs 25 and pixel electrodes, each of the source bus lines 16 being connected to the corresponding source bus lines 16 of the first liquid crystal panel 10 through a switching TFT 17. The main panel 200, sharing the source driver 15 with the first liquid crystal panel 10, is less frequently used for display than the first liquid crystal panel 10, and is disconnected by the switching TFT 17 when only the sub panel 100 is used. This makes it possible to device a twin-panel display device low in electric power consumption.