Invention Grant
- Patent Title: Method of testing circuit blocks of a programmable logic device
- Patent Title (中): 测试可编程逻辑器件电路块的方法
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Application No.: US11186373Application Date: 2005-07-21
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Publication No.: US07430697B1Publication Date: 2008-09-30
- Inventor: Deepak M. Pabari
- Applicant: Deepak M. Pabari
- Applicant Address: US CA San Jose
- Assignee: XILINX, Inc.
- Current Assignee: XILINX, Inc.
- Current Assignee Address: US CA San Jose
- Agent John J. King
- Main IPC: G01R31/28
- IPC: G01R31/28
Abstract:
A method of testing circuits in a programmable logic device is described. According to one embodiment of the invention, a method comprises steps of configuring a configurable logic block of the programmable logic device with a test signal source and a logic circuit; routing the test signal source to the logic circuit; and determining if the logic circuit is defective. According to an alternate embodiment, a method enables re-routing a path from a shift register to a lookup table to determine whether a lookup table is defective. According to a further alternate embodiment, a method enables localized routing to reduce the probability that a defect is a result of a routing defect.
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