Invention Grant
- Patent Title: Flip-flop circuit including latch circuits
- Patent Title (中): 触发电路包括锁存电路
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Application No.: US11274298Application Date: 2005-11-16
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Publication No.: US07397286B2Publication Date: 2008-07-08
- Inventor: Hideaki Miyamoto
- Applicant: Hideaki Miyamoto
- Applicant Address: JP Osaka
- Assignee: Sanyo Electric Co., Ltd.
- Current Assignee: Sanyo Electric Co., Ltd.
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2004-375148 20041227
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A flip-flop circuit capable of inhibiting current consumption as well as the circuit scale from increase is provided. This flip-flop circuit comprises a first latch circuit including first and second inverter circuits. A first power supply line capable of switching a supplied potential between a fixing potential supplied for fixing the potentials of output nodes of the first and second inverter circuits and a floating potential supplied for floating the potentials of the output nodes of the first and second inverter circuits is connected to the first latch circuit.
Public/Granted literature
- US20060139077A1 Flip-flop circuit Public/Granted day:2006-06-29
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