Invention Grant
US07339825B2 Nonvolatile semiconductor memory with write global bit lines and read global bit lines
有权
具有写入全局位线和读取全局位线的非易失性半导体存储器
- Patent Title: Nonvolatile semiconductor memory with write global bit lines and read global bit lines
- Patent Title (中): 具有写入全局位线和读取全局位线的非易失性半导体存储器
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Application No.: US11258867Application Date: 2005-10-27
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Publication No.: US07339825B2Publication Date: 2008-03-04
- Inventor: Osamu Iioka , Hiroshi Mawatari
- Applicant: Osamu Iioka , Hiroshi Mawatari
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Arent Fox LLP
- Main IPC: G11C16/02
- IPC: G11C16/02 ; G11C8/16 ; G11C8/12 ; G11C7/18 ; G11C16/06

Abstract:
A nonvolatile semiconductor memory is capable of dual and triple operation with a small chip size. A plurality of sectors is formed. Each sector has nonvolatile memory cells, local bit lines connected to these memory cells, and switch circuits. Write global bit lines and read global bit lines are each wired commonly to the sectors. The write global bit lines transfer write data to the memory cells or verify data from the memory cells. The read global bit lines transfer read data from the memory cells. The switch circuits connect the local bit lines to the write global bit lines or the read global bit lines in accordance with the operation modes. Consequently, it is possible to execute read operation while executing a write sequence or an erase sequence. That is, dual operation can be executed.
Public/Granted literature
- US20060034141A1 Nonvolatile semiconductor memory Public/Granted day:2006-02-16
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