发明授权
- 专利标题： Three-dimensional semiconductor device provided with interchip interconnection selection means for electrically isolating interconnections other than selected interchip interconnections
- 专利标题（中）： 设置有芯片间互连选择装置的三维半导体装置，用于电绝缘除了选定的芯片间互连之外的互连
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申请号： US11148363申请日： 2005-06-09
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公开(公告)号： US07330368B2公开(公告)日： 2008-02-12
- 发明人: Hideaki Saito , Yasuhiko Hagihara , Muneo Fukaishi , Masayuki Mizuno , Hiroaki Ikeda , Kayoko Shibata
- 申请人： Hideaki Saito , Yasuhiko Hagihara , Muneo Fukaishi , Masayuki Mizuno , Hiroaki Ikeda , Kayoko Shibata
- 申请人地址： JP Tokyo JP Tokyo
- 专利权人： NEC Corporation,Elpida Memory Inc.
- 当前专利权人： NEC Corporation,Elpida Memory Inc.
- 当前专利权人地址： JP Tokyo JP Tokyo
- 代理机构： Dickstein Shapiro LLP
- 优先权： JP2004-191530 20040629
- 主分类号： G11C5/06
- IPC分类号： G11C5/06 ; G11C8/12 ; G11C8/10 ; G11C7/10 ; G11C8/06
摘要：
In a three-dimensional semiconductor device in which a plurality of semiconductor circuit chips are stacked and that is provided with a plurality of interchip interconnections for signal transmission between these semiconductor circuit chips, when transmitting signals, only one interchip interconnection that serves for signal transmission is selected and other interchip interconnections are electrically isolated by means of switches that are provided between the interchip interconnections and signal lines. Interchip interconnection capacitance relating to the charge and discharge of interconnections is thus minimized.
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