发明授权
- 专利标题: Low power vector summation apparatus
- 专利标题(中): 低功率矢量求和装置
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申请号: US11359201申请日: 2006-02-22
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公开(公告)号: US07328227B2公开(公告)日: 2008-02-05
- 发明人: Kameran Azadet , Meng-Lin Yu , Zhan Yu
- 申请人: Kameran Azadet , Meng-Lin Yu , Zhan Yu
- 申请人地址: US PA Allentown
- 专利权人: Agere Systems Inc.
- 当前专利权人: Agere Systems Inc.
- 当前专利权人地址: US PA Allentown
- 主分类号: G06F7/00
- IPC分类号: G06F7/00
摘要:
An low power vector summation apparatus is provided for using 2's complement arithmetic without the high switching activity of the prior art. In particular, the invention operates to exploit the sign-extension property of a 2's complement number. A reduced representation for 2's complement numbers is provided to avoid sign-extension and the switching of sign-extension bits. The maximum magnitude of a 2's complement number is detected and its reduced representation is dynamically generated to represent the signal. A constant error introduced by the reduced representation is also dynamically compensated.
公开/授权文献
- US20060143259A1 Low power vector summation method and apparatus 公开/授权日:2006-06-29
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