Invention Grant
- Patent Title: Low-noise differential bias circuit and differential signal processing apparatus
- Patent Title (中): 低噪声差分电路和差分信号处理装置
-
Application No.: US11038415Application Date: 2005-01-21
-
Publication No.: US07324791B2Publication Date: 2008-01-29
- Inventor: Toshifumi Nakatani , Shinichi Osako , Jyunji Itoh
- Applicant: Toshifumi Nakatani , Shinichi Osako , Jyunji Itoh
- Applicant Address: JP Osaka
- Assignee: Matsushita Electric Industrial Co., Ltd.
- Current Assignee: Matsushita Electric Industrial Co., Ltd.
- Current Assignee Address: JP Osaka
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Priority: JP2004-016089 20040123
- Main IPC: H04B1/40
- IPC: H04B1/40

Abstract:
A low-noise differential bias circuit is provided which obtains excellent noise characteristics while ensuring excellent distortion characteristics. A collector of a transistor Q11 is connected to a voltage supply point (Vcc) via a resistor R15. A base of the transistor Q11 is connected to a base of a transistor Q1 via resistors R13, R11 connected in series. A connection point between the resistors R11, R13 is connected to the collector of the transistor Q11. A collector of a transistor Q12 is connected to the voltage supply point at connection point A via a resistor R16. A base of the transistor Q12 is connected to a base of a transistor Q2 via resistors R14, R12 connected in series. A connection point between the resistors R12, R14 is connected to the collector of the transistor Q12. By this configuration, a high frequency ground is performed at the connection point A.
Public/Granted literature
- US20050164649A1 Low-noise differential bias circuit and differential signal processing apparatus Public/Granted day:2005-07-28
Information query