A method for fabricating a flash memory device including the steps of: providing a substrate having thereon a gate with therein a control gate; lining the substrate and the gate with a liner; forming a silicon layer on the liner; forming a sacrificing layer on the silicon layer; etching the sacrificing layer to expose a portion of the silicon layer; removing the exposed silicon layer to expose a portion of the liner; removing the sacrificing layer; forming a spacer layer on the substrate covering the remaining silicon layer and the exposed liner; etching the spacer layer to form a spacer on sidewall of the gate; and removing the silicon layer that is not covered by the spacer thereby forming floating gate on sidewall of the gate.