发明授权
- 专利标题: Method for fabricating circuitry component
- 专利标题(中): 电路元件制造方法
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申请号: US10794472申请日: 2004-03-05
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公开(公告)号: US07297614B2公开(公告)日: 2007-11-20
- 发明人: Jin-Yuan Lee , Mou-Shiung Lin , Ching-Cheng Huang
- 申请人: Jin-Yuan Lee , Mou-Shiung Lin , Ching-Cheng Huang
- 申请人地址: TW Science-Based Industrial Park, Hsinchu
- 专利权人: MEGICA Corporation
- 当前专利权人: MEGICA Corporation
- 当前专利权人地址: TW Science-Based Industrial Park, Hsinchu
- 代理商 Winston Hsu
- 主分类号: H01L21/46
- IPC分类号: H01L21/46 ; B23P19/00
摘要:
An integrated chip package structure and method of manufacturing the same is by adhering dies on an organic substrate and forming a thin-film circuit layer on top of the dies and the organic substrate. Wherein the thin-film circuit layer has an external circuitry, which is electrically connected to the metal pads of the dies, that extends to a region outside the active surface of the dies for fanning out the metal pads of the dies. Furthermore, a plurality of active devices and an internal circuitry is located on the active surface of the dies. Signal for the active devices are transmitted through the internal circuitry to the external circuitry and from the external circuitry through the internal circuitry back to other active devices. Moreover, the chip package structure allows multiple dies with different functions to be packaged into an integrated package and electrically connecting the dies by the external circuitry.
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