Invention Grant
- Patent Title: On-chip latch-up protection circuit
- Patent Title (中): 片内闭锁保护电路
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Application No.: US10446049Application Date: 2003-05-28
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Publication No.: US07253999B2Publication Date: 2007-08-07
- Inventor: Ming-Dou Ker , Jeng-Jie Peng , Hsin-Chin Jiang
- Applicant: Ming-Dou Ker , Jeng-Jie Peng , Hsin-Chin Jiang
- Agency: Berkeley Law & Technology Group LLP
- Priority: TW91111475A 20020529
- Main IPC: H02H9/00
- IPC: H02H9/00

Abstract:
An on-chip latch-up protection circuit. The lath-up protection circuit includes a core circuit, a power switch, and a current extractor. The power switch controls major current flowing through the core circuit. The current extractor detects amplitude of the major current. The power switch, the core circuit and the current extractor are coupled in series between a relatively-high power line and a relatively-low power line. When the major current surpasses a predetermined amplitude, the power switch is turned off, causing latch-up stops.
Public/Granted literature
- US20030222703A1 On-chip latch-up protection circuit Public/Granted day:2003-12-04
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