Invention Grant
- Patent Title: Protective interleaf for stacked wafer shipping
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Application No.: US11200373Application Date: 2005-08-09
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Publication No.: US07138726B2Publication Date: 2006-11-21
- Inventor: Gonzalo Amador , Sandra Rodriguez
- Applicant: Gonzalo Amador , Sandra Rodriguez
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Yingsheng Tung; Wade James Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/58
- IPC: H01L21/58 ; B65B39/00

Abstract:
A package includes a first and a second wafer stored therein in a stacked configuration. The first wafer has interconnection conductor material portions extending from a first surface thereof. The interconnection conductor material portions have a maximum height. An interleaf member is located between the first and second wafers. A first recessed portion is formed in the interleaf member, and it has an outer perimeter shape corresponding to an outer perimeter shape of the first wafer. The first recessed portion has a first depth from a top surface of the interleaf member. A second recessed portion is formed in the interleaf member and located at least partially within the first recessed portion, and it has a bottom surface at a second depth from the top surface. The second depth is greater than the first depth. The second depth minus the first depth is greater than the maximum height.
Public/Granted literature
- US20060073633A1 Protective interleaf for stacked wafer shipping Public/Granted day:2006-04-06
Information query
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