Invention Grant
- Patent Title: Redundancy fuse circuit
- Patent Title (中): 冗余保险丝电路
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Application No.: US10803936Application Date: 2004-03-19
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Publication No.: US07123527B2Publication Date: 2006-10-17
- Inventor: Naokazu Kuzuno , Kiyoharu Oikawa , Kimio Maruyama , Yasuhiro Watanabe , Masaya Kubota
- Applicant: Naokazu Kuzuno , Kiyoharu Oikawa , Kimio Maruyama , Yasuhiro Watanabe , Masaya Kubota
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
- Priority: JP2003-078474 20030320
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A redundancy fuse circuit including a function of replacing a defective cell in a memory cell array with a redundancy cell, comprising a fuse circuit in which an address of the defective cell or a block including the defective cell is programmed as a defective address by presence/absence of cut-off of a fuse, a data latch circuit which latches a signal supplied from a tester to program the defective address in a dummy manner, and a comparator which replaces the defective cell with the redundancy cell based on an address signal supplied from the tester and an output signal of the data latch circuit at an operation confirmation time of the redundancy fuse circuit.
Public/Granted literature
- US20040240249A1 Redundancy fuse circuit Public/Granted day:2004-12-02
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