Invention Grant
- Patent Title: Device isolation structures of semiconductor devices and manufacturing methods thereof
- Patent Title (中): 半导体器件的器件隔离结构及其制造方法
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Application No.: US11027034Application Date: 2004-12-30
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Publication No.: US07042062B2Publication Date: 2006-05-09
- Inventor: Kwan-Ju Koh
- Applicant: Kwan-Ju Koh
- Applicant Address: KR Seoul
- Assignee: DongbuAnam Semiconductor Inc.
- Current Assignee: DongbuAnam Semiconductor Inc.
- Current Assignee Address: KR Seoul
- Agent Andrew D. Fortney
- Priority: KR10-2003-0101893 20031231
- Main IPC: H01L21/762
- IPC: H01L21/762
Abstract:
A device isolation structure of a semiconductor device may be a silicon wafer, a trench formed in the silicon wafer to have a predetermined depth, a first thermal oxide layer formed to an inner surface of the trench, a pad oxide layer formed on the silicon wafer, a second thermal oxide layer formed on the pad oxide layer and having a round side adjacent to an opening of the trench, and a field oxide layer filled in the trench having the first thermal oxide layer.
Public/Granted literature
- US20050145980A1 Device isolation structures of semiconductor devices and manufacturing methods thereof Public/Granted day:2005-07-07
Information query
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