Invention Grant
- Patent Title: MOS transistor and fabrication method thereof
- Patent Title (中): MOS晶体管及其制造方法
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Application No.: US10911930Application Date: 2004-08-04
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Publication No.: US07033875B2Publication Date: 2006-04-25
- Inventor: Kwan-Ju Koh
- Applicant: Kwan-Ju Koh
- Applicant Address: KR Seoul
- Assignee: DongbuAnam Semiconductor Inc.
- Current Assignee: DongbuAnam Semiconductor Inc.
- Current Assignee Address: KR Seoul
- Agent Andrew D. Fortney
- Priority: KR10-2003-0054651 20030807
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A MOS transistor and a method for fabricating the MOS transistor. The present invention enables implementation of a stable semiconductor device that is capable of protecting against leakage current generation by improving the “LDD effect” and securing a large process margin by adjusting an “off” current. The method for fabricating a MOS transistor includes placing or arranging an epitaxial layer between a silicon wafer and a gate electrode, and forming three impurity regions, including a very low concentration impurity region, and a low concentration impurity region and a high concentration impurity region (source and drain region).
Public/Granted literature
- US20050029682A1 MOS transistor and fabrication method thereof Public/Granted day:2005-02-10
Information query
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