Invention Grant
US06920512B2 Computer architecture and system for efficient management of bi-directional bus
有权
用于双向总线高效管理的计算机架构和系统
- Patent Title: Computer architecture and system for efficient management of bi-directional bus
- Patent Title (中): 用于双向总线高效管理的计算机架构和系统
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Application No.: US10780395Application Date: 2004-02-17
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Publication No.: US06920512B2Publication Date: 2005-07-19
- Inventor: Maurice B. Steinman , Richard E. Kessler , Gregg A. Bouchard
- Applicant: Maurice B. Steinman , Richard E. Kessler , Gregg A. Bouchard
- Applicant Address: US TX Houston
- Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee Address: US TX Houston
- Main IPC: G06F13/40
- IPC: G06F13/40 ; G06F13/00

Abstract:
An efficient system and method for managing reads and writes on a bi-directional bus to optimize bus performance while avoiding bus contention and avoiding read/write starvation. In particular, by intelligently managing reads and writes on a bi-directional bus, bus latency can be reduced while still ensuring no bus contention or read/write starvation. This is accomplished by utilizing bus streaming control logic, separate queues for reads and writes, and a simple 2 to 1 mux.
Public/Granted literature
- US20040177184A1 Computer architecture and system for efficient management of bi-directional bus Public/Granted day:2004-09-09
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