Invention Grant
US06859092B2 Method and low voltage CMOS circuit for generating voltage and current references
失效
用于产生电压和电流参考的方法和低压CMOS电路
- Patent Title: Method and low voltage CMOS circuit for generating voltage and current references
- Patent Title (中): 用于产生电压和电流参考的方法和低压CMOS电路
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Application No.: US10418569Application Date: 2003-04-17
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Publication No.: US06859092B2Publication Date: 2005-02-22
- Inventor: Eric John Lukes , Patrick Lee Rosno , James David Strom , Dana Marie Woeste
- Applicant: Eric John Lukes , Patrick Lee Rosno , James David Strom , Dana Marie Woeste
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Joan Pennington
- Main IPC: G05F1/46
- IPC: G05F1/46 ; G05F1/10 ; G05F3/02

Abstract:
A method and a low voltage, complementary metal oxide semiconductor (CMOS) circuit are provided for generating voltage and current references with a low voltage power supply. A voltage generating circuit provides a voltage reference and is formed by a plurality of CMOS transistors and a resistor. An operational amplifier includes a differential pair of CMOS transistors. The first voltage reference is applied to an input of the differential pair of transistors and an output of the differential pair of transistors providing a second voltage reference. The operational amplifier includes a plurality of current reference transistors. A first voltage generating circuit generates a first voltage and a second voltage generating circuit generating a second voltage. The first and second voltage generating circuits are formed by a plurality of CMOS transistors. The generated first and second voltages are applied to the voltage reference generating circuit and current reference transistors.
Public/Granted literature
- US20040207460A1 Method and low voltage CMOS circuit for generating voltage and current references Public/Granted day:2004-10-21
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