- 专利标题： Multiple circuit blocks with interblock control and power conservation
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申请号： US10633567申请日： 2003-08-05
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公开(公告)号： US06853239B2公开(公告)日： 2005-02-08
- 发明人: Tadashi Hoshi , Kenji Hirose , Hideaki Abe , Junichi Nishimoto , Midori Nagayama
- 申请人： Tadashi Hoshi , Kenji Hirose , Hideaki Abe , Junichi Nishimoto , Midori Nagayama
- 申请人地址： JP Tokyo
- 专利权人： Renesas Technology Corporation
- 当前专利权人： Renesas Technology Corporation
- 当前专利权人地址： JP Tokyo
- 代理机构： Reed Smith LLP
- 代理商 Stanley P. Fisher, Esq.; Juan Carlos A. Marquez, Esq.
- 优先权： JP2001-284383 20010919
- 主分类号： H01L21/822
- IPC分类号： H01L21/822 ; G06F1/32 ; H01L27/04 ; H03K19/00 ; H03K19/0175 ; G11C5/14
摘要：
A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the elected circuit block to other circuit blocks, wherein a single output of the interblock interface circuit is branched out to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission to other circuit blocks and includes a storage unit for storing a signal right before the power cut.
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