Magnetic memory devices having multiple bits per memory cell

Invention Grant

US06801451B2 Magnetic memory devices having multiple bits per memory cell 有权

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Patent Title: Magnetic memory devices having multiple bits per memory cell
Application No.: US10235045

Application Date: 2002-09-03
Publication No.: US06801451B2

Publication Date: 2004-10-05
Inventor: Lung T. Tran , Manish Sharma
Applicant: Lung T. Tran , Manish Sharma
Main IPC: G11C1100
IPC: G11C1100

Magnetic memory devices having multiple bits per memory cell

Abstract:

A memory cell of a data storage device includes serially-connected first and second magnetoresistive devices. The first magnetoresistive device has first and second resistance states. The second magnetoresistive device has third and fourth resistance states. The four resistance states are detectably different.

Public/Granted literature

US20040042264A1 Magnetic memory devices having multiple bits per memory cell Public/Granted day:2004-03-04

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