Invention Grant
US06788156B2 Adaptive variable frequency clock system for high performance low power microprocessors
有权
用于高性能低功耗微处理器的自适应变频时钟系统
- Patent Title: Adaptive variable frequency clock system for high performance low power microprocessors
- Patent Title (中): 用于高性能低功耗微处理器的自适应变频时钟系统
-
Application No.: US10456660Application Date: 2003-06-06
-
Publication No.: US06788156B2Publication Date: 2004-09-07
- Inventor: Simon M. Tam , Stefan Rusu
- Applicant: Simon M. Tam , Stefan Rusu
- Main IPC: H03B2800
- IPC: H03B2800
Abstract:
A method for dynamically varying a clock frequency in a processor. The method of one embodiment comprises driving a clock distribution network with a clock output from a phased locked loop (PLL). An adjustable clock generator is locked with the phased locked loop. The adjustable clock generator is substituted for the PLL on the clock distribution network.
Public/Granted literature
- US20030201838A1 ADAPTIVE VARIABLE FREQUENCY CLOCK SYSTEM FOR HIGH PERFORMANCE LOW POWER MICROPROCESSORS Public/Granted day:2003-10-30
Information query
