Invention Grant
US06757810B1 Microprocessor including memory for storing set value used to select and executive instruction after completing exception handling caused by exception request
失效
微处理器包括用于存储设置值的存储器，用于在完成由异常请求引起的异常处理之后选择和执行指令
- Patent Title: Microprocessor including memory for storing set value used to select and executive instruction after completing exception handling caused by exception request
- Patent Title (中): 微处理器包括用于存储设置值的存储器，用于在完成由异常请求引起的异常处理之后选择和执行指令
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Application No.: US09657906Application Date: 2000-09-08
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Publication No.: US06757810B1Publication Date: 2004-06-29
- Inventor: Masafumi Takahashi
- Applicant: Masafumi Takahashi
- Priority: JP11-258009 19990910; JP2000-268939 20000905
- Main IPC: G06F132
- IPC: G06F132
Abstract:
A control section sets a value “1” to a first flip-flop when a core executes a halt instruction. An OR circuit halts to output the clock. When the detection section detects an occurrence of the exception request, the control section copies the value “1” of the first flip-flop to a second flip-flop and then sets the value “0” to the first flip-flop to restart the supply of the clock to the core through the circuit. When detecting that the value “1” is set in the second flip-flop, the core judges that the state of the core was in the halt state when the exception request occurred, the core returns to the halt state after the completion of the exception handling by executing the halt instruction. When the second flip-flop does not store the value “1”, the core executes an instruction next to the address of the halt instruction.
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